Abstract The emerging field of neuromorphic computing for edge control applications poses the need to quantitatively estimate and limit the number of spiking neurons, to reduce network complexity and optimize the number of neurons per core and hence, the chip size, in an application-specific neuromorphic hardware. While rate-encoding for spiking neurons provides a robust way to encode signals with the same number of neurons as an ANN, it often lacks precision. To achieve the desired accuracy, a population of neurons is often needed to encode the complete range of input signals. However, using population encoding immensely increases the total number of neurons required for a particular application, thus increasing the power consumption and on-board resource utilization. A transition from two neurons to a population of neurons for the LQR control of a cartpole is shown in this work. The near-linear behavior of a Leaky-Integrate-and-Fire neuron can be exploited to achieve the Linear Quadratic Regulator (LQR) control of a cartpole system. This has been shown in simulation, followed by a demonstration on a single-neuron hardware, known as Lu.i. The improvement in control performance is then demonstrated by using a population of varying numbers of neurons for similar control in the Nengo Neural Engineering Framework, on CPU and on Intel’s Loihi neuromorphic chip. Finally, linear control is demonstrated for four multi-linked pendula on cart systems, using a population of neurons in Nengo, followed by an implementation of the same on Loihi. This study compares LQR control in the NEF using 7 control and 7 neuromorphic performance metrics, followed by a comparison with other conventional spiking and non-spiking controllers.

Abstract Progress in neuromorphic computing requires efficient implementation of standard computational problems, like adding numbers. Here we implement a variety of sequential and parallel binary adders in the Lava software framework, and deploy them to the neuromorphic chip Loihi 2. To the best of our knowledge, up to now, a neuromorphic implementation of such parallel adders has not been reported. We describe the time complexity, neuron and synaptic resources, as well as constraints on the bit width of the numbers that can be added with the current implementations. Further, we measure the time required for the addition operation on-chip. Importantly, we encounter trade-offs in terms of time complexity and required chip resources for the three considered adders. While sequential adders have linear time complexity O ( n ) and require a linearly increasing number of neurons and synapses with number of bits n, the parallel adders have constant time complexity O ( 1 ) and also require a linearly increasing number of neurons, but nonlinearly increasing synaptic resources (scaling with n 2 or n n ). This trade-off between compute time and chip resources may inform decisions in application development, and the implementations we provide may serve as a building block for further progress towards efficient neuromorphic algorithms.

Abstract The computational substrate of biological systems exhibits remarkable abilities to learn complex skills quickly and efficiently. Inspired by this, we implement model-based reinforcement learning using spiking neural networks directly on mixed-signal neuromorphic hardware. This approach combines energy-efficient electronic circuits with high sample efficiency through alternating online (‘awake’) and offline (‘dreaming’) learning phases. Our model features two networks: an agent network that learns from real and simulated experiences and a world model network that generates simulated experiences. We validate this by training the system to play Atari Pong. First, we establish a baseline using only real experiences. Then, by ‘dreaming’, the required real experiences decrease significantly. The network dynamics runs in real-time on the analog neuromorphic circuits, with only the readout layers implemented and trained on a computer-in-the-loop. We present results that demonstrate the robustness and potential of energy-efficient mixed-signal neuromorphic processors for real-world applications.

Abstract Physics-inspired computing paradigms are receiving renewed attention to enhance efficiency in compute-intensive tasks such as artificial intelligence and optimization. Similar to Hopfield neural networks, oscillatory neural networks (ONNs) minimize an Ising energy function that embeds the solutions of hard combinatorial optimization problems. Despite their success in solving unconstrained optimization problems, Ising machines still face challenges with constrained problems as they can become trapped in infeasible local minima. In this paper, we introduce a Lagrange ONN (LagONN) designed to escape infeasible states based on the theory of Lagrange multipliers. Unlike existing oscillatory Ising machines, LagONN employs additional Lagrange oscillators to guide the system towards feasible states in an augmented energy landscape, settling only when constraints are met. Taking the maximum satisfiability problem with three literals as a use case (Max-3-SAT), we harness LagONN's constraint satisfaction mechanism to find optimal solutions for random SATlib instances with up to 200 variables and 860 clauses, which provides a deterministic alternative to simulated annealing for coupled oscillators. We benchmark LagONN with SAT solvers and further discuss the potential of Lagrange oscillators to address other constraints, such as phase copying, which is useful in oscillatory Ising machines with limited connectivity.

Abstract We propose a novel ultra-high-speed neuron device utilizing a superconductive single flux quantum (SFQ) circuit to realize an ideal rectified linear unit (ReLU) activation function. This circuit generates quantum-accurate voltage output through frequency conversion within the SFQ digital circuit. A significant advantage of this design is its combination of high-speed and ultra-low-power operation with inherent tolerance to device parameter variations. This crucial feature mitigates performance degradation often observed in large-scale neural networks that rely on analog neuron circuits susceptible to characteristic variation of neuron devices. We designed and implemented the proposed neuron circuit using a 10 kA cm−2 Nb four-layer 1.0 μm fabrication process. Experimental measurements at 4.2 K confirmed correct operation up to approximately 41.2 GHz input. Results from multiple chips successfully demonstrated ideal ReLU input–output characteristics, showcasing both the high-speed nature of the device and the scalability and robustness of our neuron circuits for next-generation artificial neural network hardware.

Abstract The prevailing of artificial intelligence-of-things calls for higher energy-efficient edge computing paradigms, such as neuromorphic agents leveraging brain-inspired spiking neural network (SNN) models based on spatiotemporally sparse binary spikes. However, the lack of efficient and high-accuracy deep SNN learning algorithms prevents them from practical deployments at a strictly bounded cost. In this paper, we propose the spatiotemporal orthogonal propagation (STOP) algorithm framework to tackle this challenge. In the STOP framework, spatially-backward neuronal errors and temporally-forward traces propagate orthogonally and independently, mitigating the huge memory requirement for storing neural states across all time-steps and simplifying the computational flow. Furthermofe, the STOP framework enables fully synergistic learning of synaptic weights, firing thresholds, and leakage factors to improve SNN accuracy. Our STOP algorithm obtained high recognition accuracies of 94.84%, 74.92%, 98.26% and 77.10% on the CIFAR-10, CIFAR-100, DVS-Gesture and DVS-CIFAR10 datasets with adequate deep convolutional SNNs of VGG-11 or ResNet-18 structures. Compared with other deep SNN training algorithms, our method is more plausible for edge intelligent scenarios where resources are limited but high-accuracy in-situ learning is desired.

Abstract Biologically plausible learning rules for neural networks, such as e-prop (eligibility propagation), are essential both for advancing neuromorphic computing and for understanding fundamental mechanisms of learning in animal brains. However, their behavior under different network conditions remains unclear. Here, we investigate the performance of the e-prop learning algorithm in recurrent spiking neural networks (RSNNs) across different levels of recurrent connectivity and input noise using a complex temporal credit assignment task, a supervised classification problem known to be solvable by rodents. We show that increased sparsity in the recurrent layer significantly enhances learning performance by promoting the generation of more diverse activation patterns. Analysis of the network’s evolution further reveals that the e-prop-trained input layer evolves to route distinct inputs to different regions of the recurrent layer while suppressing the contribution of noise. This partially resembles signal routing functions attributed to the thalamus in mammalian sensory systems, providing additional support for the biological plausibility of e-prop. These findings offer promising insights for efficiency and advantages of biologically inspired training in RSNNs.

Abstract Simulating brain-scale networks digitally is often hindered by extensive memory access. In this context, using low-precision data types and more efficient models to represent state variables is a viable alternative to improve the scalability of the networks under consideration. However, understanding whether these approaches hurt the expected dynamics of the system is critical yet still poorly understood. This study aims to integrate 8-bit floating-point implementations with neural models optimised for efficient memory access to simulate spiking neural networks endowed with spike-timing-dependent plasticity. By doing this, we not only address scalability issues but also consider the biological plausibility of the network activity. We show that stochastic rounding (SR) is necessary to overcome the floating-point errors associated with weight updates and present our custom SR scheme, which was applied to all arithmetic operations. Under these conditions, we study the limitations and behaviour of plastic weight dynamics and large-scale balanced networks. Our results suggest that the models developed can be used to reproduce many prominent features previously described in studies of cortical stability and information processing. Such an approach offers a promising perspective on optimising spiking neural networks for real-time simulations and resource-constrained digital hardware. Such technology could be used to understand neurological disorders by providing insights into abnormal neural activity patterns. It could also enhance brain-computer interfaces, and aid in cognitive neuroscience research, contributing to novel therapeutic strategies.

Abstract Spike sorting is a crucial step in decoding multichannel extracellular neural signals, enabling the identification of individual neuronal activity. A key challenge in brain–machine interfaces is achieving real-time, low-power spike sorting at the edge while keeping high neural decoding performance. This study introduces the neuromorphic sparse sorter (NSS), a compact two-layer spiking neural network optimized for efficient spike sorting. NSS leverages the locally competitive algorithm for sparse coding to extract relevant features from noisy events with reduced computational demands. NSS learns to sort detected spike waveforms in an online fashion and operates entirely unsupervised. To exploit multi-bit spike coding capabilities of neuromorphic platforms like Intel’s Loihi 2, a custom neuron model was implemented, enabling flexible power-performance trade-offs via adjustable spike bit-widths. Evaluations on simulated and real-world tetrode signals with biological drift showed NSS outperformed established pipelines such as WaveClus3 and PCA + KMeans. With 2-bit graded spikes, NSS on Loihi 2 outperformed NSS implemented with leaky integrate-and-fire neuron and achieved an F 1-score of 77% (+10% improvement) while consuming 8.6 mW (+1.65 mW) when tested on a drifting recording, with a computational processing time of 0.25 ms (+60 µs) per inference.

Abstract Reservoir computing (RC) is a feedforward computational framework derived from recurrent neural networks that leverages the high-dimensional dynamic behaviors of complex systems for efficient information processing. A wide range of interdisciplinary research has been undertaken in recent years to fully enhance the capabilities of RC, especially with the advent of physical RC (PRC). PRC has demonstrated efficacy in applications for biomedical edge devices with advantages in power consumption, latency, bandwidth and privacy. This article provides a structured review of PRC implementation paradigms in different categories and their applications in biomedical signal processing, including the training methods. Additionally, it discusses the emerging opportunities and outlines existing challenges for the practical industrial applications.