Wafer Direct Bonding: From Advanced Substrate Engineering to Future Applications in Micro/Nanoelectronics

Abstract

Wafer direct bonding refers to the process of adhesion of two flat mirror-polished wafers without using any intermediate gluing layers in ambient air or vacuum at room temperature. The adhesion of the two wafers occurs due to attractive long range van der Waals or hydrogen bonding forces. At room temperature the bonding energy of the interface is low and higher temperature annealing of the bonded wafer pairs has to be carried out to enhance the bonding energy. In this paper, we describe the prerequisites for the wafer-bonding process to occur and the methods to prepare the suitable surfaces for wafer bonding. The characterization techniques to assess the quality of the bonded interfaces and to measure the bonding energy are presented. Next, the applications of wafer direct bonding in the fabrication of novel engineered substrates such as silicon-on-insulator and other on-insulator substrates are detailed. These novel substrates, often called hybrid substrates, are fabricated using wafer bonding and layer splitting via a high dose hydrogen/helium implantation and subsequent annealing. The specifics of this process, also known as the smart-cut process, are introduced. Finally, the role of wafer bonding in future nanotechnology applications such as nanotransistor fabrication, three-dimensional integration for high-performance micro/nanoelectronics, nanotemplates based on twist bonding, and nano-electro-mechanical systems is discussed