Abstract
We report a novel visible-near infrared photoMOSFET containing a self-organized, gate-stacking heterostructure of SiO2/Ge-dot/SiO2/SiGe-channel on Si substrate that is simultaneously fabricated in a single oxidation step. Our typical photoMOSFETs exhibit very large photoresponsivity of 1000-3000A/W at low optical power (< 0.1μW) or large photocurrent gain of 103-108A/A with a wide dynamic power range of at least 6 orders of magnitude (nW-mW) linearity at 400-1250 nm illumination, depending on whether the photoMOSFET operates at VG = + 3- + 4.5V or -1- + 1V. Numerical simulations reveal that photocarrier confinement within the Ge dots and the SiGe channel modifies the oxide field and the surface potential of SiGe, significantly increasing photocurrent and improving linearity.
Highlights
Recent progress in Si photonics technology including Ge/GeSn lasers [1], Si/Ge modulators [2], Ge/SOI waveguides [3], and Ge photodetectors [4], has offered promising solutions for the construction of monolithically-integrated Si optical interconnect systems for low-power and low-latency data transmission
The key novelty of this gate-stacking heterostructure is that it is nanofabricated within a single oxidation step of SiGe nano-pillars that are lithographically patterned over a buffer Si3N4 layer on top of the Si substrate
We carried out numerical analysis in order to determine the respective contributions of Ge dots and the SiGe channels on the gain and linearity of photocurrents measured for our Ge-dot/SiO2/SiGe photoMOSFETs
Summary
Recent progress in Si photonics technology including Ge/GeSn lasers [1], Si/Ge modulators [2], Ge/SOI waveguides [3], and Ge photodetectors [4], has offered promising solutions for the construction of monolithically-integrated Si optical interconnect systems for low-power and low-latency data transmission. Photodetectors are fabricated based on PN, PIN or avalanche diode structures because of the structural simplicity of these devices as well as the ease of fabrication. Such photodiodes suffer from having high dark currents, occupying large areas, and/or operating at high voltages, thereby leading to substantial performance penalties such as higher power dissipation, device area, latency, and noise
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