Abstract
To design a high gain amplifier at V-band using 130 nm CMOS process, the gain-boosted technique is adopted to increase the maximum achievable gain (G max ). Impedance matching synthesis is investigated for input and output matching circuits based on transmission lines. By adopting appropriate transistor size, a single stage amplifier can achieve the maximum gain of 10 dB at 53 GHz.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
