Abstract
The XC4000 Logic Cell Array Family of field programmable gate arrays developed by Xilinx includes support for the IEEE Standard 1149.1 Test Access Port and Boundary Scan Architecture. Boundary-scan with built-in self-test is known to provide tests of high quality. The design and implementation of boundary-scan with built-in self-test that conforms fully to the IEEE Standard 1149.1 for the XC4000 device is presented. Fault simulation was performed to evaluate the effectiveness of the built-in self-test. Hardware was realized with the XC4003PC84-6 used on the Xilinx demo board. The boundary scan and self test logic was controlled via the widely available parallel printer port of an IBM compatible PC. This results in an ideal hardware/software combination for use in teaching and demonstrating boundary scan and self-test principles.
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