Unleashing redox activity of biochar via a green thermal air oxidation process: Insights from machine learning

We apply the recently introduced Silicon Nitride Thermal Oxidation (SiNTO) process for the industrial fabrication of silicon solar cells that feature a thermal oxide-passivated rear surface. The SiNTO process utilises a SiNX anti-reflection layer for masking the front side of the solar cell during the thermal oxidation process. This masking layer limits the growth of the thermal oxide to the uncoated rear surface. Laser fired contact (LFC) technology is applied to form the local rear contacts. An efficiency of 18.6% (annealed) and 18.4 % (stable, independently confirmed) is achieved for a PERC device fabricated from boron-doped Czochralski-silicon by means of the SiNTO process. The average efficiency of a batch of 34 SiNTO cells is 18.2%, measured after fabrication (not stabilised). Parallel processed Al-BSF references reach average efficiencies of 17.7%. Thus, the SiNTO approach enables an efficiency increase of 0.5% absolute compared to conventional Al-BSF technology. When introducing soldering pads, the efficiency gain for SiNTO compared to Al-BSF cells even increases to 0.8% absolute. Finally, we use a comprehensive analytical model to estimate the optimum bulk resistivity for locally contacted devices fabricated from conventional Czochralski silicon material. These calculations account for the bulk recombination caused by the formation of boron-oxygen complexes under carrier injection.

For non-flammability usages, composite structures with nano-additives or carbonized form of polyacrylonitrile (PAN) are generally preferred. In this study, a pre-carbonized form of nanofiber webs (OxPAN) is firstly proposed as a non-flammable material to eliminate the need for carbonization. The thermal oxidative stabilization process is applied to the PAN nanofibers to achieve high structural stability. This prevents melting and fusing during the thermal treatments and thereby improves the thermal stability of the web. PAN nanofiber webs were successfully obtained via the electrospinning technique and the thermal oxidation process was then applied. The structural properties of the oxidized PAN nanofiber webs were investigated by Attenuated Total Reflectance-Fourier Transform Infrared Spectroscopy, Raman Spectroscopy and X-Ray Photoelectron Spectroscopy and Electrochemical Impedance Spectroscopy. The surface morphology of the OxPAN was examined by scanning electron microscopy and the average fiber diameter was measured as 265 ± 64 nm. The thermal properties were analyzed with a differential scanning calorimeter and a thermal gravimetric analyzer. The flammability performance was tested via the Limiting Oxygen Index (LOI), and it was found that in addition to being lightweight, OxPAN nanofiber webs exhibit splendid performance with a LOI value of 48–49%.

The use of olive oil with cooking purposes, as final seasoning or within cooked foods is increasing worldwide due to its numerous nutritional and health benefits. These attributes are mainly determined by olive oil chemical composition, which can be altered after thermal processing, oxidation processes, or incorrect practices. For this reason, and due to the numerous factors which have influence in olive oil quality, the correct chemical characterization is highly relevant. In this study, fatty acid composition of four extra virgin olive oil (EVOO) varieties was studied. The major fatty acid (FA) determined was oleic acid (77.1% on average), followed by palmitic (11.5% on average). In addition, thermal oxidation behaviour of the four EVOO samples was studied as an indicator of their quality and stability during thermal processing. This was performed through differential scanning calorimetry (DSC) from a temperature of 40°C at six different heating rates in the range of 0.5–10°C min−1. DSC records showed the same pattern and a small shoulder in the thermo-oxidation peak was present for all samples and all heating rates. The presence of initial and final oxidation products (by monitoring K232 and K270 values, respectively) was discarded according to the International Olive Council method.

In this study, the effect of thermal oxidation treatment on Ti6Al4V alloy in the HA coating by Electrophoretic Deposition (EPD) technique was investigated. For this purpose, the HA powders were produced by chemical precipitation method and characterization studies of produced hydroxyapatite powders were carried out by X-Ray Diffraction (XRD), and powder size analysis. Then, thermal oxidation process was applied to Ti6Al4V samples at different temperatures. The surface roughness of Ti6Al4V samples were measured in order to determine the thermal oxidation effect on Ti6Al4V surface. Then, HA coating was pruduced on Ti6Al4V at the determined voltage and time by EPD process. HA deposition efficiency on Ti6Al4V was determined according to thermal oxidation process. The obtained results showed that the thermal oxidation process affects the coating efficiency positively.

Using Zn as target to fabricate ZnO coating by thermal oxidation in air on quartz substrate

Through silicon via plays a very important role in three-dimensional integrated systems. At present, BOSCH etching technology, which inevitably induces scallop pattern in the inner side wall, is the most popular technology for etching of through silicon via. Scallop pattern will lead to the unsmooth interface between layers inside through silicon via, which will seriously affect the performance of through silicon via and the reliability of three-dimensional integrated systems. An effective thermal oxidation process is employed to improve sidewall flatness. During high temperature thermal oxidation, the higher oxygen flow rate can ensure that the oxygen concentration in the via is nearly uniform, and the growth rate of SiO2 in the scallop ridge bulge is relatively faster. The scallop pattern on the inner wall of through silicon via can be effectively reduced by alternating high temperature oxidation and etching SiO2. For silicon through via with a ratio of depth to width of 8: 1, after four times of high temperature thermal oxidation (the process conditions of each oxidation process are T = 1150 °C, t = 10minutes, and the oxidizing environment is wet oxygen) and four times etching SiO2, the maximum scallop ripple decreases from 400nm to 90nm. And the surface diameter of the through silicon via increases from 11.2μm to 12.82μm. After once high temperature thermal oxidation (t = 180minutes, other conditions are the same as four times oxidation process) and etching SiO2, the maximum scallop ripple decreases from 400nm to 100nm. And the surface diameter of the through silicon via increases from 11.2μm to 12.65μm. Experimental results show that the thermal oxidation process can effectively improve inner side wall flatness of through silicon via. Four times thermal oxidation with short oxidation time is more effective than once thermal oxidation with long oxidation time.

On the 4H-SiC substrate, C-face and Si-face oxide layers have been grown by thermal oxidation process and sputtering. The thermal oxidation temperature dependence of 4H-silicon carbide (SiC) is systematically investigated using capacitance-voltage (C–V) measurements. The oxidation quality and thickness vary according to the temperature and time duration of the thermal oxidation. The layers’ thicknesses are determined by atomic force microscopy (AFM), and the temperature range is between 800°C and 1110 °C. The primary reason to fabricate the Metal-Oxide-Silicon (MOS) capacitor is to know the thermal oxidation process and a working principle. In this paper, we optimize a thermal oxidation process and fabricate the MOS structure. Then we determine the various parameters such as flat band voltage (Vf b), Inversion threshold voltage (Vt), Surface depletion capacitance (Cdep), Oxide capacitance (Cox), the total capacitance of the device (Co), doping concentration (Nd), Depletion width (Xd), Maximum depletion width (Xdt) and Interface trap density (Dit). Finally, we analyze and discuss the MOS capacitance.

Thermal diffusion and oxidation processes are used in semiconductor and photovoltaic device manufacturing since decades and are to a large extent understood. However, a closer look reveals that not all aspects are well explained in literature. We observe for POCl3 diffused surfaces (drive-in at 860 °C) on wafers with different surface morphology (textured vs. non-textured) and crystal orientation (<100> vs. <111>) after subsequent dry thermal oxidation systematically a retrograde phosphorus P concentration profile in the first surface-near 10-20 nm. The retrograde part of the profiles is in contradiction to the pile-up of phosphorus on the Si side of the Si/SiO2 interface that is described in literature [1, 2] to be the consequence of the respective segregation coefficients. The observation is not a measurement artefact but the result of the thermal oxidation process. ECV and SIMS measurements have been cross checked with four-point probe sheet resistance measurements. In addition, SENTAURUS simulations have been performed to back up the observation. We conclude that the observations should result in new models for thermal processing (diffusion and oxidation) that might impact future solar cell process optimization.

We present a novel method for the industrial fabrication of a silicon solar cell that features an oxide-passivated rear surface. The SiNTO process (silicon nitride thermal oxidation) utilizes a SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">X</sub> layer for masking the front side of the solar cell during the thermal oxidation process. This masking layer prevents the oxidation of the textured and phosphorus-doped emitter surface and limits the growth of the thermal oxide to the uncoated rear surface. After oxidation the SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">X</sub> layer remains at the front side of the cell and serves as an anti-reflection coating (ARC). In this work we investigate the impact of the thermal oxidation process on the SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">X</sub> film and the underlying emitter and analyze the passivation quality of the thermal oxide. The oxidation process results in a sufficiently passivated rear surface with a surface recombination velocity of ~40 cm/s, measured after Al-metallization and post-metallization anneal. Measurements of the emitter sheet resistance and secondary ion mass spectrometry (SIMS) profiling reveal that the SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">X</sub> -coated emitter reorganizes slightly during the oxidation process whereas an uncoated reference is strongly affected. The emitter dark saturation current density is affected as well. Oxide-passivated solar cells are fabricated from Czochralski (Cz) silicon using the SiNTO approach. A 136 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> large cell fabricated using industrial processing equipment reaches an efficiency of 17.8% (stable), which demonstrates the feasibility of the SiNTO process.

The dielectric insulation layer is critical to the TSV package reliability and the process of forming sidewall insulation of through silicon via (TSV) was a challenging bottleneck in 3D integration. In this paper, dielectric insulation layers in TSV with aspect ratio of 10:1 were fabricated by PECVD tetraethyl orthosilicate (TEOS) process and thermal oxidation process. The morphology and step coverage of the dielectric insulation layers were characterized using field emission scanning electron microscopy (FESEM). The electrical performance of blanket PECVD TEOS films and thermal oxide films were investigated by mercury probe Voltage-current (I-V) and Capacitance — Voltage (C-V) measurements. The PECVD TEOS films show good conformality, high breakdown voltage and low current leakage. The thermal oxide films have higher step coverage of almost 100% and lower leakage current. By combining PECVD TEOS process and thermal oxidation process, dual thermal oxide/PECVD TEOS insulation layers with high step coverage are fabricated.

The corrosion phenomena are always give bad impact to any metal products including human implants. This is due to the corrosion impacts are harmful for hard tissues and soft tissues. There are many methods to prevent the process of corrosion on implant materials such as coating with bioceramic materials and modify the implant surface with surface modification techniques. However, until now there is still no gold standard to overcome this problem and it is remain in researching process. Thus, the aim of this research is to investigate the potential and economical surface modification method to reduce the corrosion effects on Cobalt-Chromium-Molybdenum (Co-Cr-Mo) based alloy when insert in human body. The thermal oxidation process was selected to treat Co-Cr-Mo surface substrate. Firstly, Co-Cr-Mo alloy was heated in muffle furnace at constant temperature of 850°C with different duration of heating such as 3 hours and 6 hours in order to analyze the formation of oxide layer. The corrosion behaviours of untreated sample and oxidized sample were investigated utilizing potentiodynamic polarization tests in simulated body fluids (SBF). The Vickers hardness after corrosion testing was measured in order to evaluate the effect of thermal oxidation in reducing corrosion rate. Based on the results obtained it is clearly showed that substrates undergone thermal oxidation with 6 hours duration time performed better than 3 hours duration, with the hardness value 832.2HV vs. 588HV respectively. Dense oxide layer and uniform thickness formed on the oxidized substrates able to help in reducing the corrosion effects on Co-Cr-Mo alloy without degraded its excellent mechanical properties. The microstructures of oxidized substrates before and after corrosion test were also analyzed using FESEM images for better observations. It was determined that corrosion resistance of Co-Cr-Mo substrate can be increased with oxide layer formed on the alloys using thermal oxidation process.

Thermal oxidation and photooxidation processes occurring in poly 2,2-bis[4-(3,4-dicarboxyphenoxy)phenyl]propane dianhydride−1,3-phenylendiamine copolymer (ULTEM), were investigated and compared. The study aimed at finding possible differences in the oxidation pathways of this complex polymer by using the analytical power of MALDI techniques. ULTEM films were subjected to photooxidation by exposure at 60 °C in a UV accelerated chamber (Q-UV Panel) in atmospheric air, and the oxidative process was followed as a function of the exposure time. Relevant structural information on the photooxidized ULTEM species was extracted from the MALDI spectra. These data show the presence of polymer chains containing acetophenone, phenyl acetic acid, phenols, benzoic acid, phthalic anhydride, and phthalic acid end groups. The mechanisms accounting for the formation of photooxidation products of Ultem involve several reactions: (i) photocleavage of methyl groups of the N-methyl phthalimide terminal units; (ii) photooxidati...

Characterization of Oxidation-Induced Stacking Fault Rings in Cz Silicon: Photoluminescence Imaging and Visual Inspection After Wright etch

Normal spectral emissivity measurement study of high-temperature alloy (316L) at 673–1273 K with a thermal oxidation surface

4H-SiC has attractive properties for power devices of high voltage applications, however, the performance of MOSFETs is often severely limited by the existence of electrically active defects at SiO2/SiC interface. The formation of interface states is often attributed to the carbon-related byproducts of thermal oxidation, however as suggested by theoretical study, it may also partly originate from the non-uniformity in electrical structure of 4H-SiC, due to the oxidation-induced local strains at the 4H-SiC surface [1]. In this study we systematically investigated the lattice distortions introduction in 4H-SiC surface region after various oxidation processes and the recovery of that directly by using surface sensitive in-plane x-ray diffractometry (XRD). 4º off-axis 4H-SiC (0001) wafers covered with 5 μm-thick n-type epitaxial layers were employed in this study. The wafers were cleaned by HF solution, then thermal oxidation process in dry oxygen at 1300ºC for various oxidation time were performed. For some of the samples, the thermally grown SiO2 layer was removed by chemical etching in HF solution, followed by annealing in Ar at 1150ºC or 1300ºC for various annealing time. The shallow incident angles less than or slightly more than the critical angle were used for in-plane XRD measurements to limit the x-ray penetration depth which can be widely tuned simply by changing the incident angle.In the in-plane XRD pattern, a peak corresponding to the diffraction of (1-100) planes was detected. The interplanar spacing was characterized for the result obtained with different incident angles. Before thermal oxidation, as expected, no significant peak position shift was observed even by changing the incident angle, since the lattice constant should be uniformly distributed in the epitaxial layer. In contrast, the peak position of oxidized 4H-SiC sample shifted to the lower angle for small incident angle measurement and gradually shifted back by increasing the incident angle [2]. In addition, when we changed the thermal oxide thicknesses by performing dry oxidation for different time, the shift of the peak position became larger for the longer oxidation time, and reaches to as large as +0.4% distortion for >40nm-thick oxide case [2]. The x-ray penetration depth where such a significant shift of the lattice constant was observed, was estimated to be only several hundreds of nanometers from the SiC surface, by a simple approximation of the penetration depth taking account of the critical angle and the x-ray absorption coefficient of 4H-SiC. These results clearly indicate that the dry oxidation process induces a significant lattice distortion locally in the surface region of 4H-SiC wafer. We also found that the lattice distortion of SiC surface remained even after the complete removal of SiO2 thin film by HF etching, though it was partially reduced. Thus the detected local strain in the surface region of SiC is distinguishable from an intrinsic strain due to the thermal expansion coefficient difference and atomic density difference of Si between SiC and SiO2 [3]. A further recovery of the lattice constant in the surface region was observed by Ar annealing. It should be noted that the relaxation occurs gradually by extending the Ar annealing time to a few hours even at 1300ºC, which is equivalent to the oxidation temperature in this study. This suggests a thermally-activated process inside SiC is required for the relaxation of the surface distortion. Actually a higher recovery rate was observed for 1300ºC than that for 1150ºC annealing. From these results we speculate that the observed surface distortion of 4H-SiC is caused by oxidation-induced defects which are accumulated only in the surface region and induce a significant strain locally in the surface region. Then the gradual relaxation by Ar annealing would be corresponding to the processes of decomposition of the defects followed by migration and desorption of the ejected atoms from the defects. Even though the relationship between the observed surface strain and the electrical structure of SiC surface is not clarified yet, such significant strain should have a certain impact on the electrical properties of SiO2/SiC interfaces.