Underfill For Ultra-Low Bumped (10μ) 3D Package

Abstract

3D package has recently become very attractive because it can provide more flexibility in device design and supply chain, reduce the gap between silicon die and organic substrate, help miniaturize device and meet the demand of high speed, more memory, more function and low cost. With the advancement of 3D package, the bump height is now down from 80μ to 10 μ. When the bump diameter is 20–40μ and height 10μ, the process and reliability are obvious issues. It is well known that underfill can enhance the reliability for regular flip chip, however it is very difficult for traditional flip chip underfill or board level underfill flow into 10μ multi-layer of 3D package without process and reliability issues. A unique flip chip underfill series has been successfully developed, which not only function as traditional underfill such as flip chip but also work very well for 10μ bump height 3D package application. YINCAE underfill series allow fast flow into 3D package and fast cure. After underfilling and cure, there are no voids observed in underfill. In this paper, a total of four different underfills have been studied. Compared to the other flip chip underfill, YINCAE underfill has demonstrated both excellent workability and outstanding reliability. In terms of workability and reliability, the four different flip chip underfills can be ranked in the following order from best to worst: A underfill > B underfill > C underfill > D underfill.