TSV Backside Reveal by a Wet Etching Process

Abstract

TSVs are expected to increase interconnect bandwidth, reduce wire delay due to shorter vertical signal path, and improve power efficiency. In via-middle TSV integration, Si must be removed from the backside of the wafer to make contact with the bottom of the TSVs. This operation is performed using a mechanical grinding followed by a reveal etch. The backside reveal determines the TSV connection performance, and is a key step in the fabrication. In this paper we demonstrate a controlled wet etch back method that uses a spin wet etch back process having excellent repeatability, reduced process defect and reduced copper contamination. We will briefly review TSV integration technology; samples preparation and single wafer wet etch equipment. Then a set of experiments is described, which is used to select etch parameters to achieve the desired TSV reveal height and selectivity. Lastly we will show results of our TSV reveal process.