Abstract

In preparation for the high-luminosity phase of the Large Hadron Collider, ATLAS is planning a trigger upgrade that will enable the experiment to use tracking information already at the first trigger level. This will provide enhanced background rejection power at trigger level while preserving much needed flexibility for the trigger system. The status and current plans for the new ATLAS Level-1 tracking trigger are presented.

Highlights

  • Setting the LandscapeLessons from Run-I LHC upgrade programme Physics goals and challenges aheadATLAS is embarking in a staged programme of detector and trigger upgrades, spanning the two decadesPhase-II ATLAS Upgrades inner tracker (ITK) and all thatA new Level-1 Tracking Trigger is part of the ATLAS baseline for the High-Luminosity LHC phase (CERN-2012-022, LHCC-1-023)The ATLAS Level-1Tracking TriggerBaseline architecture and alternatives

  • R3 bottleneck addressed by Prioritization of R3 over L1 data Increased Hybrid Chip Controller (HCC) bandwidth

  • Requirements for self-seeded architecture not currently implemented in the baseline ITK design

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Summary

Trigger a key element of this success

Identifies Regions of Interest (RoIs) for use by the subsequent trigger levels Reduced granularity. Software-based High-Level Trigger (HLT) Level-2 & Event Filter Running on large commercial CPU farms Uses tracker information Full detector granularity. A De Santo, ATLAS L1Track Trigger, ICHEP 2014 [ See Pastore’s and Panduro Vazquez’s talks ]. New fast track-trigger (FTK) uses custom-designed hardware to provide tracks at L1 rates, for HLT use Further Phase-I upgrades reduce fake rates and improve resolution. Upgraded front-end calorimeter electronics higher granularity calorimeter segmentation (shower shape). Detailed study of Higgs phenomenology, including rare decays e.g., 7-sigma Hà μμ signal with S/B=3×10-3

Packets passed based on chip location priority level
Increase pT threshold?
Findings
+ Conclusions and Outlook
Full Text
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