Toward the interfacing of systemC-AMS models with hardware-emulated platforms

Abstract

Systems on chip (SoC) nowadays, have become heterogeneous in nature. They can be composed of a mix of analog and digital components. In some verification environments, SystemC models the digital components and SystemC-AMS extensions can be used to model the analog part. In an emulation environment, the digital components would be probably running on the emulator while the SystemC-AMS components would be running on the associated emulator host machine. In this paper, we propose an approach to interface those digital and analog components. This is challenging because SytemC-AMS is a timed environment with a time wheel completely decoupled from emulation time. We also propose a transaction packing technique that will minimize the communication overhead introduced due to frequent exchange of data between the components running on the emulator and the components running on the host machine. Finally, we describe a case study that illustrates the feasibility of the proposed interfacing approach.