Abstract

This paper presents the first known timing-error detection (TED) microprocessor able to operate in subthreshold. Since the minimum energy point (MEP) of static CMOS logic is in subthreshold, there is a strong motivation to design ultra-low-power systems that can operate in this region. However, exponential dependencies in subthreshold, require systems with either excessively large safety margins or that utilize adaptive techniques. Typically, these techniques include replica paths, sensors, or TED. Each of these methods adds system complexity, area, and energy overhead. As a run-time technique, TED is the only method that accounts for both local and global variations. The microprocessor presented in this paper utilizes adaptable error-detection sequential (EDS) circuits that can adjust to process and environmental variations. The results demonstrate the feasibility of the microprocessor, as well as energy savings up to 28%, when using the TED method in subthreshold. The microprocessor is an 8-bit core, which is compatible with a commercial microcontroller. The microprocessor is fabricated in 65 nm CMOS, uses as low as 4.35 pJ/instruction, occupies an area of 50,000 μm2, and operates down to 300 mV.

Highlights

  • Exploiting the full potential of ubiquitous ambient intelligence, smart sensor networks, and energy-harvesting, requires extremely low power processing

  • We studied timing error detection in a microprocessor that is capable of subthreshold operation

  • The register dump was loaded from the chip, and the dumped register values were compared against known results to verify the correct functionality

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Summary

Introduction

Exploiting the full potential of ubiquitous ambient intelligence, smart sensor networks, and energy-harvesting, requires extremely low power processing. The brain behind a future small autonomous robot could very likely be a massively parallel computing unit running at a low energy point for a single processing node. Without intelligent design solutions, countering the increased variance effects requires large design margins or individual post-fabrication measurements of the components In terms of these options, the former negates the minimum energy operation, while the latter increases production costs considerably. This paper presents a subthreshold TED microprocessor, which could represent a computation node for a future, massively parallel system. To our knowledge, this is the first known subthreshold TED system.

Minimum Energy Point and Subthreshold Operation
Timing-Error Detection
Subthreshold TED Microprocessor
Architecture
Timing-Error Detection and Recovery
Implementation of Core 1 and 2
Silicon Measurement Results
Conclusions
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