Timing Properties of Synchronous Systems

Abstract

The general structure and principles for operating a fully synchronous digital VLSI system are described in Chapter 2. The combinational logic and the storage elements make up the computational circuitry used to implement a specific synchronous system. The clock distribution network provides the time reference for the storage elements—or registers—thereby enforcing the required logical order of operations. This time reference consists of one or more clock signals that are delivered to each and every register within the integrated circuit. These clock signals control the order of computational events by controlling the exact times the register data input signals are sampled.