Abstract

A high-gain wide-bandwidth three-stage amplifier, which employs dual-miller compensation with nulling-resistor and dual-feedforward compensation (DMCNR-DFC), is designed and analyzed in this paper. By adopting the technique of DMCNR-DFC, the designed three-stage amplifier achieves well performance including gain-bandwidth product (GBW) and slew rate (SR). The improved DMCNR-DFC three-stage amplifier is designed and simulated in 0.5μm BCD process. Simulation results show that DMCNR-DFC three-stage amplifier achieves a dc gain of about 121.1dB and GBW of about 6.1MHz with 52o phase margin using a 5-V power supply voltage.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.