Abstract
A kinetic Monte Carlo simulation of the electromigration-induced void migration behavior of three-dimensional nanovoids at the interface between a metal conductor and its dielectric overlayer is presented. Major stages of the recently observed failure mode of surface void migration and accumulation at the cathode via of Cu damascene interconnects were simulated, including the trapping at and detachment from grain boundaries (GBs) and GB triple junctions. The migration and shape evolution of voids along the interface and along the grain boundaries intersecting this interface have also been investigated in detail. The main results of the simulation correlate well with in situ observations as well as with simple analytical models of void trapping and detachment from GBs and their junctions.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
