Thermal performance evaluation and methodology for pyramid stack die packages

Abstract

The packaging industry has devised various die stacking solutions to meet the electronic industry's growing demand for higher memory and functionality. Multiple devices packaged within the same footprint results in higher temperatures which adversely affect thermal performance and reliability. Thermal management and characterization of stacked die packages thus becomes vital. Thermal evaluation of such packages is complicated as there is more than one heat source. To address this challenge, this paper demonstrates the application of the linear super position (LSP) principle to evaluate the thermal performance of a pyramid stacked die (D2-FBGA) package. The package was modeled using FLOTHERMreg and simulation results were validated with experimental data obtained using JEDEC specified environment and measurement techniques. Upon excellent correlation, an approach using LSP was proposed to generate the thermal resistance matrix used to predict thermal performance for various power configurations. The LSP principle is found to be very suitable for predicting thermal performance of pyramid stack packages with negligible error. This method is very useful for comparing thermal performance of pyramid stacked die packages. To optimize the thermal performance of the package under designed simulation matrix, sensitivity studies of mold compound and die attach conductivity on thermal behavior were also conducted.