Abstract
We report for the first time the integration of silicon-doped hafnium oxide (HSO) antiferroelectric (AFE) material for enhanced floating-gate Flash memory speed by means of field-enhanced AFE polarization switching. An analytical description of the metal–ferroelectric–metal–insulator–semiconductor (MFMIS) stack physics during a write operation is introduced to study the effect of different stack optimization parameters on the interfacial oxide field. This, in turn, suggests different optimization routes for a ferroelectric field-effect transistor (FeFET) and Flash memories with a possible improved Flash interfacial field by AFE material integration. Improved Fowler–Nordheim tunneling based Flash speed of 300 ns is illustrated for the integrated devices. The theory and experiment of the MFMIS stack physics are discussed with emphasis on the role of stack parameters for optimized memory operation.
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