The use of interface-sensitive test structure comprising of shallow trench isolation as a tool for analyzing the quality of Si–SiO2 interfaces

Abstract

Si–SiO2 interface plays an important role in the performance of VLSI devices. Minor changes in interfaces, which cannot be detected by direct measurements, can alter the electrical performance of sensitive devices, for example CMOS Image Sensors (CIS). In such cases, there is a significant time delay (up to several months) between the processing of the interface and the monitoring of its quality. In what follows, we describe herein a method for analyzing the quality of Shallow Trench Isolation (STI) interface based on analyzing the performance of a simple STI interface named as Sensitive High Resistance Structure (SSHR). This testing device can be introduced in the production line as a “short loop” monitoring device. The method was demonstrated by comparing various cleaning treatments while analyzing the resistivity and breakdown voltage of the SSHR device. Results were correlated with STI-sensitive final products such as CIS and Lateral Diffused Metal Oxide Semiconductor (LDMOS) transistors.