Abstract

For 2D mesh based Network-on-Chip (NoC), the prohibited turns of routing algorithms should be repetitively distributed in order for the routing algorithms to be implemented by logic-based circuit. In this paper, we aim to exploit the designing space for logic-based routing algorithms, and propose new logic-based routing algorithms that outperform the state-of-the-art counterparts. Toward this direction, we firstly construct all routing algorithms for $5 \times 5$ 2D mesh topology. Then we select those routing algorithms which have repetitive prohibited turns across both the network rows and columns. In addition, we chose those routing algorithms that have smaller routing pressures than Odd-Even routing algorithm. Then the routing algorithms for 2D mesh topology ranging from $6 \times 6$ to $15 \times 15$ are respectively constructed according to the prohibited turns distribution of the selected routing algorithms. Two routing algorithms that have smaller routing pressures than Odd-Even routing algorithm are obtained for all considered networks. The obtained logic-based routing algorithms are called as Repetitive Turn Model (RTM). Simulation results show that RTM could achieve up to 51% performance improvement as compared to Odd-Even routing algorithm.

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