Abstract

N-channel metal oxide semiconductor field effect transistors (MOSFETs) with Ta/sub 2/O/sub 5/ gate dielectric were fabricated. An intrinsic Ta/sub 2/O/sub 5//silicon barrier height of 0.51 eV was extracted from the gate current. The effective Ta/sub 2/O/sub 5//silicon barrier height including image force barrier lowering is about 0.37 eV with drain to source voltage V/sub DS/ ranging from 1.5 V to 4.0 V. Due to the low barrier height, negative transconductance effect was observed in the linear region. The decrease of drain current is due to the real space transfer of electrons from the drain terminal to the gate electrode.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.