Abstract
The fabrication of sub-0.1-/spl mu/m CMOS devices and ring oscillator circuits has been successfully explored. The key technologies include: lateral local super-steep-retrograde (SSR) channel doping with heavy ion implantation, 40-nm ultrashallow source/drain (S/D) extension, 3-nm nitrided gate oxide, dual p/sup +//n/sup +/ poly-Si gate electrode, double sidewall scheme, e-beam lithography and RIE etching for sub-0.1-/spl mu/m poly-Si gate pattern, thin and low sheet resistance SALICIDE process, etc. By these innovations in the technologies, high-performance sub-0.1-/spl mu/m CMOS devices with excellent short-channel effects (SCEs) and good driving ability have been fabricated successfully; the shortest channel length is 70 nm. 57 stage unloaded 0.1-/spl mu/m CMOS ring oscillator circuits exhibiting delay 23.8 ps/stage at 1.5 V, and 17.5 ps/stage and 12.5 ps/stage at 2 V and 3 V, respectively, are achieved.
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