Abstract
Separate software is hard to achieve real-time HD decoding for its sequential execution, while pure hardware is unable to complete the complex AVS video decoding. Aiming at this, this paper adopts the SoC scheme to develop the controller in AVS decoder. The author selected the OpenRISC1200 processor for its no licensing fees and completely open source. For AVS decoder’s high-complexity, we reconfigured the core to optimize it and designed some peripherals - SDRAM controller, VGA controller, and Wishbone bus module. By elaborating the module’s design, simulation, synthesis, static timing analysis and formal verification, this paper proposes a solution of high-speed & high integration controller in AVS-SoC decoder chip. This controller can quickly complete the AVS stream parsing and system controlling, and also it can improve the AVS chip’s integration and the versatility. Overall, it has great application value and broad market prospects.
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