Abstract

The ALPIDE chip is a CMOS Monolithic Active Pixel Sensor being developed for the Upgrade of the ITS of the ALICE experiment at the CERN Large Hadron Collider. The ALPIDE chip is implemented with a 180nm CMOS Imaging Process and fabricated on substrates with a high-resistivity epitaxial layer. It measures 15mm×30mm and contains a matrix of 512×1024pixels with in-pixel amplification, shaping, discrimination and multi-event buffering. The readout of the sensitive matrix is hit driven. There is no signaling activity over the matrix if there are no hits to read out and power consumption is proportional to the occupancy. The sensor meets the experimental requirements of detection efficiency above 99%, fake-hit probability below 10−5 and a spatial resolution of 5μm. The capability to read out Pb–Pb interactions at 100kHz is provided. The power density of the ALPIDE chip is projected to be less than 35mW/cm2 for the application in the Inner Barrel Layers and below 20mW/cm2 for the Outer Barrel Layers, where the occupancy is lower. This contribution describes the architecture and the main features of the final ALPIDE chip, planned for submission at the beginning of 2016. Early results from the experimental qualification of full scale prototype predecessors are also reported.

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