Abstract
This chapter reviews systolic algorithms. Exploiting the regularity of the time consumed by front-end processing of signal and image processing and by parallelism systolic architectures properly implemented, it is possible to achieve high performance with low cost. Being able to use each input data item a number of times is just one of the many advantages of a systolic architecture. This and other advantages of systolic architectures make it highly desirable for very-large-scale integration (VLSI) implementations. Mathematical algorithms implementable with systolic architectures are called systolic algorithms. A systolic algorithm has many systolic cells that can operate in parallel, and each of them is to be implemented by a processing element (PE) in a systolic architecture. A large number of systolic algorithms are known today and several theoretical frameworks for the design of systolic algorithms are being developed. Some problems for which systolic solutions exist, are: (1) signal and image processing, (2) matrix arithmetic, and (3) non-numeric applications. Designing systolic algorithms, however, constitutes the very beginning phase of the total effort of constructing a systolic device for real-life application use.
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