Systematic Optimization of Multiple-Output DC Distribution Architectures

Abstract

Complex electronic systems often require a power distribution architecture that provides multiple, separate voltage domains for various subsystem loads, such as microprocessor cores, interface, memory, analog, and radio frequency components. The multiple point-of-load regulated voltages are typically generated using multiple dc–dc converters operating from a single input dc voltage. This article introduces the permutation-graph (PG) method to systematically optimize multiple-voltage-domain dc distribution architectures using commercially available or custom single-input single-output dc–dc converter building blocks. The PG method enumerates possible converter arrangements and selects the converter blocks to achieve the best system figure of merit (FOM) in terms of system efficiency, size, cost, power density, or a combination of these metrics. In representative case study examples, considering a system operating from 48-V input dc voltage and requiring seven regulated point-of-load dc voltages {1, 1.3, 3.3, 5, 12, 24, and 40} V, it is shown how the proposed approach can improve the system FOM by more than 50% compared with solutions offered by a commercially available tool using standard dc–dc blocks. It is also shown how the inclusion of custom dc–dc blocks results in a different optimal arrangement, which yields further system FOM improvements. The approach is validated by experimental results on two 120-W system prototypes, providing five regulated dc voltages {1, 3.3, 5, 12, and 24} V from a 48-V dc bus.