Abstract
As today's leading edge manufacturers are developing and preparing to implement 22 nm technology node integrated circuits and beyond into manufacturing, new issues emerge. Certain components used in current generation CMP barrier slurries or new components used to achieve improved performance at the advanced nodes either no longer are sufficient or cause new integration issues. Many of these issues involve the surface state of the polished films after the Cu-barrier CMP step. Surface states during polishing can lead to undesirable topography effects, such as "fangs". Unprotected high density Cu lines can lead to high electrical leakage issues due to corrosion. Thin residual layers left behind on the polished surfaces can create defectivity or downstream deposition and/or contamination issues. This study looks closely at various formulation components used in barrier CMP slurries, how they electrochemically interact with the materials they contact and how they may change the post CMP polished surfaces.
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