Abstract
In this paper, the variabilities of threshold voltage (VTH), drain-induced barrier lowering (DIBL), and current onset voltage (COV) in intrinsic channel silicon nanowire metal–oxide–semiconductor field-effect transistors (MOSFETs) were evaluated and compared with those of conventional bulk and fully depleted (FD) silicon-on-insulator (SOI) MOSFETs. The random component of variability is extracted by a “within-device” variability method to exclude the systematic component. It is found that the within-device variabilities of DIBL and COV as well as VTH are extremely small in intrinsic channel nanowire MOSFETs owing to the non-intentionally doped channel and small gate workfunction variability. The intrinsic channel nanowire MOSFET is promising for a future scaled device structure in terms of not only the short channel effect suppression but also the variability suppression.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
