Abstract
Drain-conductance frequency dispersion in GaAs/AlGaAs heterojunction FETs is suppressed by a partially depleted p-layer between the channel and the semi-insulating substrate. Though the p-layer is electrically floating, the electrical potential of the layer is stabilized to the source voltage by minimized capacitive coupling with the drain electrode, while at low frequencies the potential is fixed to the source voltage by the resistive balance of two pn junctions at each end of the layer. Thus, the p-layer acts as a grounded shielding layer. Though the effective drain voltage region is limited by drain p-layer depletion at low voltage and by avalanche breakdown (kink effect) at high voltage, this structure will enable to suppress the substrate deep trap problems in some GaAs FET circuits.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
