Substrate current reduction techniques for BiCMOS DRAM

Abstract

Substrate current (I/sub BB/) reduction techniques useful to BiCMOS DRAM's are proposed through a comparison of the I/sub BB/ characteristics for a BiCMOS driver and a CMOS driver and through a clarification of the I/sub BB/ generation mechanism. Four key results are obtained. One is that the I/sub BB/ of conventional BiCMOS drivers is unacceptably high, i.e, three times larger than that of CMOS drivers. Another is that the excessive I/sub BB/ of BiCMOS drivers is generated by the saturation of bipolar transistors, which results from a collector voltage decrease caused by large amounts of collector current flowing through the collector saturation resistance r/sub cs/. The third result concerns proposals for I/sub BB/ reduction techniques. One features two collector outputs terminals for avoiding the r/sub cs/ effect and the other features application of a low supply voltage for the base. The last result is that BiCMOS drivers using the I/sub BB/ reduction techniques make it possible to achieve 1-Mbit BiCMOS DRAM'S with I/sub BB/ levels comparable to those of conventional CMOS DRAM's. >