Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications

Abstract

In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length (Lch) of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current (Ioff) of 1.12 × 10 -11 A/μm. In addition, the use of the high-k spacer dielectric HfO₂ improves the on-state current (Ion) with an intrinsic delay time (τ) because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower Ioff at a lower supply voltage (VDD) of 0.2 V.