Abstract
This paper presents a review of constraints, limitation factors and challenges to implement sub 1 V CMOS bandgap voltage reference (BVR) circuits in today’s and future submicron technology. Moreover, we provide insight analysis of BVR circuit architectures a designer can relay upon when building CMOS voltage reference.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
