Abstract

We fabricated the ferroelectric-gate field effect transistors (Fe-FETs) using a metal-ferroelectric-insulator-semiconductor (MFIS) structure as a gate configuration using (Bi,La)4Ti3O12 (BLT) and SrTa2O6 (STA) thin films. From the capacitance-voltage (C-V) measurements for MFIS capacitors, a hysteric shift with a clockwise direction was observed and the memory window width was about 1.5 V for the plusmn5 V bias sweep. The leakage current density was as low as 1x10-7 A/cm2 at 5 V. From drain current-gate voltage characteristics of the fabricated Fe-FETs, the obtained threshold voltage shift (memory window) of the device was about 0.5 V due to the ferroelectric nature of BLT film. The drain current-drain voltage characteristics of the fabricated FeFETs showed typical n-channel FETs characteristics.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.