Stress from isolation trenches in silicon substrates

Abstract

Stress from isolation trenches in silicon integrated circuits has been studied using an analytical solution that the author recently obtained for the stress problem of a parallelepipedic inclusion in a three-dimensional semispace. The origin of the stress is assumed to be the thermal mismatch between the trench fill and the silicon substrate, or equivalently the intrinsic stress of the trench fill. The effect of various trench parameters such as the trench length, width, and depth, as well as the proximity to other trenches, are investigated for a number of cases. The results are shown for all stress components in order to provide an insight into the characteristics of the trench-induced stress. There are some surprises: Some examples are the existence of a tensile pocket in the stress component normal to the trench side, and that stress components both normal and parallel to the trench increase greatly in intensity as the trench becomes shorter.