Stress and Recovery Dynamics of Drain Current in GaN HD-GITs Submitted to DC Semi-ON stress

Abstract

Stress and recovery dynamics of the drain current are analysed in normally-off GaN Hybrid-Drain - embedded Gate Injection Transistors (HD-GITs) submitted to a semi-ON state stress. Under this condition moderate drain current and high drain voltage (350-650 V) are applied simultaneously. During the stress phase the drain current shows a remarkable decrease due to hot carrier trapping and is dependent on the applied drain voltage, stress current and temperature (30–190 °C). This degradation is fully recoverable, either thermally in the temperature range 150–190 °C or by hole injection from the gate. We provide a model for the detrapping time constant taking into account both the thermally-driven process dominating for gate biases VGS < 3 V and hole capture dominant for VGS > 3 V.