Abstract
Multi-channel defect detection in epitaxial SiC layers is used to detect and classify various extended defects. The effects of the killer defect category are analyzed on hundreds of production diode and MOSFET wafers. Invariably, the number of these killer defects sets the yield entitlement for each wafer, and electrically, they fall into a few expected failure bins depending on their position on the die. A variety of non-killer defects like Bar Stacking Faults (BSFs), V-type defects, isolated micro-pipe related bumps, stacking faults, scratches and deep pits are identified in over thousand die each, and their effect on fully fabricated diode and MOSFET products are determined at wafer sort. A very high percentage of the die containing these non-killer defects pass all electrical tests including the rigorous Unclamped Inductive Switching (UIS) testing. Specifically, a population of electrically passing die, containing BSFs, are identified and packaged for High Temperature Reverse Bias (HTRB) tests. Every BSF containing die passes both forward and reverse 1000-hour HTRB drift tests.
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