Abstract

In this paper, very compact, standard cell-based Digital-to-Analog converters (DACs) based on the Dyadic Digital Pulse Modulation (DDPM) are presented. As fundamental contribution, an optimal sampling condition is analytically derived to enhance DDPM conversion with inherent suppression of spurious harmonics. Operation under such optimal condition is experimentally demonstrated to assure resolution up to 16 bits, with 9.4–239X area reduction compared to prior art. The digital nature of the circuits also allows extremely low design effort in the order of 10 man-hours, portability across CMOS generations, and operation at the lowest supply voltage reported to date. The limitations of DDPM converters, the benefits of the optimal sampling condition and digital calibration were explored through the optimized design and the experimental characterization of two DACs with moderate and high resolution. The first is a general-purpose DAC for baseband signals achieving 12-bit (11.6 ENOB) resolution at 110kS/s sample rate and consuming $50.8\mu \text{W}$ , the second is a DAC for DC calibration achieving 16-bit resolution with 3.1-LSB INL, 2.5-LSB DNL, $45\mu \text{W}$ power, at only $530\mu \text{m}^{2}$ area.

Highlights

  • Digital circuits have benefitted tremendously from technology scaling, the design of analog and mixed signal blocks has become increasingly challenging

  • This paper focuses on digital-to-analog converters (DACs), which are key building blocks for sensor readout, on-chip tuning/calibration, reference generation, audio processing and threshold generation for event detection [11]–[15]

  • As in any DAC architecture, Dyadic Digital Pulse Modulation (DDPM)-based converters are affected by pulse shape non-idealities, and inter-symbol interference (ISI)

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Summary

INTRODUCTION

Digital circuits have benefitted tremendously from technology scaling, the design of analog and mixed signal blocks has become increasingly challenging. From the above spectral analysis, in the following the DDPM modulation is shown to enable inherent and guaranteed suppression of most of the spurious harmonics under proper choice of the sampling period This vastly relaxes the output filter specifications. The choice of the sampling period 2N TCLK introduces inherent suppression of the dominant contribution of spurious harmonics in DDPM modulation, drastically relaxing the filter cut-off frequency requirement. Such spectral property of DDPM modulation does not apply to binary streams originated by modulators (e.g., by 1st- or 2nd-order). The overall design was completed in less than a day, confirming that DDPM converters entail an extremely low design effort

DDPM DACs AND DESIGN CONSIDERATIONS
DIGITAL CALIBRATION
EXPERIMENTAL RESULTS
CONCLUSION

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