Abstract

Semiconducting nanostructures are one of the potential candidates to accomplish low-temperature and solution-based device assembly processes for the fabrication of transistors that offer practical solutions toward realizing low-cost flexible electronics. Meanwhile, it has been shown that by introducing a contact barrier, in a specific transistor configuration, stable device operation can be achieved at much reduced power consumption. In this work, we investigate both one-dimensional ZnO nanowires (NWs) and two-dimensional nanosheets (NSs) for high performance and stable nano-transistors on conventional Si/SiO2 substrates. We have fabricated two variant of transistors based on nanoscale single-crystalline oxide materials: field-effect transistors (FETs) and source-gated transistors (SGTs). Stability tests are performed on both devices with respect to gate bias stress at three different regimes of transistor operation, namely off-state, on-state and sub-threshold state. While in the off-state, FETs shows comparatively better stability than SGTs devices, in both sub-threshold and on-state regimes of transistors, SGTs clearly exhibits better robustness against bias stress variability. The present investigation experimentally demonstrates the potential advantages of SGTs over FETs as driver transistor for AMOLEDs display circuits which require very high stability in OLED driving current.

Highlights

  • Over the last couple of decade, the scientific community has made large leaps in the development of large area high performance Thin-Film Transistors (TFTs)[1,2,3], in particular as a backplane driver transistor in display technologies[4,5,6]

  • In order to compare the magnitude of VTH shift for source-gated transistors (SGTs) device, a similar device was fabricated with ohmic contacts where the device current is dominantly controlled by the semiconductor channel

  • Stability tests were performed on both devices (FETs and SGTs), fabricated using ZnO NS, with respect to gate bias stress at three different operating regimes of transistors, namely off-state, on-state and sub-threshold state

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Summary

Introduction

Over the last couple of decade, the scientific community has made large leaps in the development of large area high performance Thin-Film Transistors (TFTs)[1,2,3], in particular as a backplane driver transistor in display technologies[4,5,6]. With the electrical gate-bias results and from Table 1, it is fair to conclude that ZnO NS-FETs show slightly superior performances compared to ZnO NW-FETs. It is further to note that the major cause of ION degradation is related to the filling of already present trap-states at the semiconductor channel/insulator interface.

Results
Conclusion

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