Abstract
For better electro-magnetic interference (EMI) reduction with minimum hardware increase, a sawtooth dual-tone modulation profile has been applied to spread spectrum clock generation (SSCG) phase locked loop (PLL). The SSCG PLL implemented in a 0.18 μm CMOS process shows the 23.8 dB EMI reduction. This result shows that proposed modulation profile provides 3.5 dB better EMI reduction with 39% increased hardware than the conventional triangular modulation profile. For fair comparison of various modulation profiles, a figure of merit (FoM) is introduced and the proposed one shows the best FoM among various modulation profiles.
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