Abstract

As superconducting qubit circuits become more complex, addressing a large array of qubits becomes a challenging engineering problem. Dense arrays of qubits benefit from, and may require, access via the third dimension to alleviate interconnect crowding. Through-silicon vias (TSVs) represent a promising approach to three-dimensional (3D) integration in superconducting qubit arrays—provided they are compact enough to support densely-packed qubit systems without compromising qubit performance or low-loss signal and control routing. In this work, we demonstrate the integration of superconducting, high-aspect ratio TSVs—10 μm wide by 20 μm long by 200 μm deep—with superconducting qubits. We utilize TSVs for baseband control and high-fidelity microwave readout of qubits using a two-chip, bump-bonded architecture. We also validate the fabrication of qubits directly upon the surface of a TSV-integrated chip. These key 3D-integration milestones pave the way for the control and readout of high-density superconducting qubit arrays using superconducting TSVs.

Highlights

  • Superconducting qubits are lithographically defined electrical circuits comprising Josephson junctions, inductors, capacitors, and interconnects that are engineered to behave as well-isolated quantum-mechanical two-level systems[1,2,3]

  • We present the integration of high aspect ratio superconducting Through-silicon vias (TSVs) with superconducting qubits

  • We benchmark the integration of superconducting TSVs with superconducting qubits using capacitively-shunted flux qubits (CSFQs)[28,29]

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Summary

Introduction

Superconducting qubits are lithographically defined electrical circuits comprising Josephson junctions, inductors, capacitors, and interconnects that are engineered to behave as well-isolated quantum-mechanical two-level systems[1,2,3]. Superconducting qubits use materials such as aluminum (Al), titanium nitride (TiN), and niobium (Nb) and substrates such as silicon (Si) and sapphire (Al2O3) that are compatible with—and strongly leverage —CMOS manufacturing toolsets and approaches[4]. Their lithographic scalability, compatibility with microwave control, and operability at the nanosecond timescale have all converged to place superconducting qubits at the forefront of nascent quantum processor development. Most multi-qubit demonstrations on superconducting qubit processors have been performed in a planar architecture: qubits and interconnects have been co-fabricated on a single-chip surface, with control and readout wiring brought in laterally from the edges of the chip[6,7,8]. While this approach can potentially support tens of qubits, interconnect crowding precludes lateral interconnection as circuits become larger

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