Abstract

In this study, slurry availability and the extent of the slurry mixing (i.e., among fresh slurry, spent slurry, and residual rinse-water) were varied via three different injection schemes. An ultraviolet enhanced fluorescence technique was employed to qualitatively indicate slurry availability and its flow on the pad during polishing. This study investigated standard pad center area slurry application and a slurry injection system (SIS) that covered only the outer half of the wafer track. Results indicated that the radial position of slurry injection and the alteration of fluid mechanics by the SIS played important roles in slurry mixing characteristics and availability atop the pad. Removal rates were found to decrease with slurry availability, while a higher degree of slurry mixing decreased the fraction of fresh slurry and consequently lowered the removal rate. By using a hybrid system (i.e., a combination of slurry injection via SIS and standard pad center slurry application), the polishing process benefited from higher slurry availability and higher fraction of fresh slurry than the conventional pad center slurry application and the shorter SIS, individually. This work underscores the importance of optimum slurry injection geometry and flow for obtaining a more cost-effective and environmentally benign chemical mechanical planarization process.

Highlights

  • Chemical mechanical planarization (CMP) is an enabling step in integrated circuit (IC) manufacturing for achieving local and global surface planarity through combined chemical and mechanical means

  • This work has shown that slurry availability and the extent of slurry mixing dramatically influence removal rates

  • The ultraviolet enhanced fluorescence (UVEF) technique showed that injecting fresh slurry solely on the center of wafer track reduces slurry availability in the pad–wafer interface, as it only covered the outer half of the wafer track

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Summary

Introduction

Chemical mechanical planarization (CMP) is an enabling step in integrated circuit (IC) manufacturing for achieving local and global surface planarity through combined chemical and mechanical means. CMP has been widely used in the semiconductor manufacturing industry since 1985 [1] Previous planarization technologies such as thermal flow and spin-on glass have been shown to provide adequate local planarity, but CMP is the only technique that provides global planarity across the wafer surface [2]. A lack of global surface planarity results in tremendous difficulties during the following steps of the IC manufacturing process, such as lower photolithography and etch yields, greater step height variation, greater line-width variation, and the amplification of previous layer defects [3]. These variations critically impact and reduce both chip performance and overall device yield [1]. Many academic and industry studies have shown that by controlling the process parameters and consumable sets, average surface roughness values ranging from 0.5 nm to 2 nm can be achieved [3,4,5,6]

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