Abstract
A new SPDR design approach is proposed. The receiver contains an RF discriminator, power detectors, a signal level comparison circuit, a decoder, and data and carrier recovery circuits for BPSK and QPSK signals. The new receiver operates solely on analog circuits, and the proposed design is validated with circuit and system simulations of an RF discriminator and a Costas-type phase-locked loop, demonstration of a demodulator at 2.4 GHz, and MMIC fabrication of an RF discriminator at 15 GHz. The new design approach offers interesting possibilities to achieve SPDR-on-a-chip. © 2000 John Wiley & Sons, Inc. Microwave Opt Technol Lett 25: 356–360, 2000.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
