Abstract
This paper uses TCAD (technology computer-aided design) to calculate practical NMOS and PMOS device behaviors under ESD/EOS events. The simulations include electrothermal effect with lattice temperature parameters. These simulations reproduce TLPG (transmission line pulse generator) current–voltage curves successfully. They also predict the same experimental tendencies of various device structural dimensions in practical engineering applications. The electrothermal device simulation has shown its ability to predict a real device ESD/EOS event. It will become a valuable tool to analyze device internal breakdown properties and find out optimized ESD/EOS conditions.
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