Simulation of information decoding processes in the output device of the biomorphic neuroprocessor

Abstract

This publication is the series of articles continuation on the creation of neuroprocessor nodes based on a composite memristor-diode crossbar. The authors have determined the principles of modifying the pulse information into a binary code in the output device of the neuroprocessor, implemented in a logical matrix based on a new electronic element — a combined memristor-diode crossbar. The processing of pulse signals is possible in the logical matrix, since one layer of the matrix is a set of logical AND or OR gates with arbitrarily connected inputs. The authors have proposed two solutions to the problem of decoding pulses from a population of neurons in the output device, coming from the hardware neural network of the neuroprocessor, into standard binary signals. The first solution involves the two layers use of a logical matrix and a pulse generator. The compactness of the second solution is achieved due to the presence of a binary number generator, which allows to get rid of one layer of the logical matrix. This article presents the SPICE modeling results of the decoding pulsed information process signals into binary format and confirms the operability of the output device electrical circuit. The originality of the device operation lies in the switching of the generator signals by the logical matrix to the neuroprocessor output based on the time delay of the input pulse from the hardware neural network. The use of the memristor logical matrix in all nodes of the neuroprocessor, including the input device, makes it possible to unify the element base of the neuroprocessor complete electrical circuit, as well as its power supplies.