Simulation of Coupled Components within Power-Hardware-in-the-Loop (PHiL) Test Bench

Abstract

Power Hardware-in-the-Loop (PHiL) becomes more and more an important part at the investigation of dynamics and stability issues of the electrical grids. As derived from Hardware-in-the-Loop (HiL) approach, one of the central PHiL requirements is to feedback measurement signals into the simulation. In PHIL applications, the operational behavior of a connected device is integrated within real-time simulations. With the integration of the Hardware under Test (HuT) into a PHiL test bench, stability issues may arise. Therefore, this paper focuses on the stability investigation and the description of typical PHiL setup and condititions. The frequency domain modelling reveals phenomenon of instability as well as concepts of Interface Algorithm (IA) and Compensation Methods (CM). To investigate the behavior of different devices as HuT, also the HuT is modelled and simulated in the real time environment. In the next step, the analog loopback integrates HuT models into PHiL simulation by using HYPERSIM from OPAL-RT as simulation software (time domain). Analog loopback introduces time delay into the PHiL simulation that would also occur in real PHiL applications with connected devices to build a more realistic environment. The simulation with analog loopback consists of implemented IAs which feedback operational behavior of HuT models into PHiL test bench. In selected simulation approaches, the mentioned technique loops back currents of various loads and inverters. Therefore it is possible to evaluate the feedback of devices with different described methods and their impact on stability and signal fidelity.