Abstract
A practical analytical model to calculate the switching loss of cascode gallium nitride high electron mobility transistors (GaN HEMTs) is proposed. To facilitate analysis and application, the transmission delays introduced by Si MOSFET and interconnection inductances are ignored in modeling. Meanwhile, the nonlinear junction capacitances of the device and circuit stray inductances are also incorporated to increase the accuracy of the model. The turn-on and turn-off switching processes are described in detail and the simplified equations can be easily solved by using mathematical tools. Based on the analytical model, loss evaluation of totem-pole PFC converter is introduced briefly. Finally, the accuracy of the model is validated by comparing the calculated loss and converter's efficiency with experiment results. Peak efficiency of 99.26% is achieved for a 3.6 kW single phase CCM Totem-Pole PFC AC/DC converter switching at 50 kHz based on 650 V cascode GaN HEMTs.
Highlights
Introduction1Wide bandgap power semiconductor devices, especially GaN HEMTs, are showing superior material properties
A practical analytical model to calculate the switching loss of cascode gallium nitride high electron mobility transistors (GaN HEMTs) is proposed
Peak efficiency of 99.26% is achieved for a 3.6 kW single phase CCM Totem-Pole PFC AC/DC converter switching at 50 kHz based on 650 V cascode GaN HEMTs
Summary
Wide bandgap power semiconductor devices, especially GaN HEMTs, are showing superior material properties. More comprehensive analytical switching loss models that include such parasitical parameters are presented in Refs. The nonlinear junction capacitances and the parasitic inductance are taken into consideration, especially the common source inductance is included These analytical switching loss models are applied to the high-frequency low-voltage buck converter and the results match the experiment results very well. All of these analytical switching loss models are devised to estimate the power loss of Si MOSFET. A normally-off GaN device can be fabricated by cascode structure, requiring packaging of the high-voltage depletion-mode GaN HEMT with a low-voltage enhancement-mode Si MOSFET [19,20,21].
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