Abstract
The present status of silicon VLSI device technology and future trend of silicon nanoelectronics are discussed. The CMOS extension will continue to be the main technology and new other technologies will be merged into CMOS. The main technical approaches to the challenges above are, respectively, (a) improve the carrier transport properties by introducing new materials, (b) improve the electrostatics of MOSFETs by introducing new transistor structures, and (c) suppress the interchip and intrachip variations. There are numerous developments and research work on further CMOS scaling.
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