Silicon Power Interposer Technology (PIT) for Integrated Power Converter

Abstract

Future generations of power converters must be miniaturized to power future electronic devices that are getting smaller and smarter. Monolithic integration is an ideal approach toward compact, efficient, and low-cost converters. This letter addresses two technology gaps in packaging technology and integrated inductor technology using the so-called power interposer technology (PIT). We implemented a step-down power converter to demonstrate PIT. The converter uses two GaN FETs, capacitors, and a gate driver stacked on a 0.28-mm-thick silicon die that hosts a 3D substrate-embedded toroidal microinductor. The converter switches 22 MHz in zero-voltage-switching mode achieving a peak efficiency of 83% at the full load of 1 W. PIT has shown unique technology advantages for future generations of integrated power converters, including high power density, low profile, superior thermal performance, scalability, and heterogeneous integration. Furthermore, PIT holds great commercial potential for high-power-density integrated power converters.