Silicon photonic WDM devices: simulation, design, and implementation

Abstract

Passive wavelength division (de)multiplexer (WDM) devices are required as basic building blocks for WDM-based on-chip optical interconnects. In this application, many copies of the devices will be placed throughout a single die, requiring that the device occupy as small a footprint as possible. Furthermore, it is critical that the demultiplexing characteristics be very uniform from device to device, therefore the device must be tolerant to small fabrication variations. There are various wavelength demultiplexer designs that lend themselves to on-chip integration with CMOS integrated circuits and that could potentially reach the above specifications. In this presentation we will show the layout and simulation of demultiplexer designs based on cascaded Mach-Zehnder wavelength splitters and on Echelle gratings and compare these to measurement results of realized devices. The results on the Mach-Zehnder devices show that this type of device is relatively sensitive to process variations. A fit of a device model to the measured curves shows that the device variations result primarily from random phase errors in the optical delay lines, which are probably due to small width variations in the waveguides. This problem should be strongly reduced in devices based on Echelle gratings, because in this case the light does not propagate through channel waveguides in the part of the device that shapes the optical response. This assumption is confirmed by the measurement results, which show good demultiplexer response and excellent reproducibility between devices.