Abstract

This paper presents Silicon Germanium (SiGe) HBT Power Amplifier design challenges and performances using 0.35 µm SiGe BiCMOS technology with a novel low inductance through-silicon-via (TSV). The large signal load pull on SiGe HBT power cells were performed, and a two-stage power amplifier was designed and measured with tunable input, inter-stage and output matching networks. For a 480 um <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SiGe HBT power cell, the peak power-added efficiency (PAE) reaches 63% with 20 dBm P1dB and 71% with 21 dBm P1dB at 3.5 GHz and 2.5 GHz respectively. HBT power cell design optimization is discussed and the various ways of using TSV are explored. The two-stage PA's gain, P1dB, and PAE for both 3.5 GHz and 2.5 GHz are reported and the good model/hardware correlations have been demonstrated. The integrated design flow with Cadence/Agilent design tools for both chip and PCB was proven to work effectively.

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