Si bilayer tunnel field-effect transistor structure realized using tilted ion-implantation technique

Abstract

A new device structure for the Si tunnel field-effect transistor (TFET) is proposed along with feasible fabrication processes. The device consists of a Si fin with high impurity concentration at the fin surfaces, which are realized using the tilted-ion-implantation technique (TII) to effectively generate the gate-normal band-to-band tunneling (BTBT) and simultaneously create carrier conduction paths from the source to the drain. Device simulation revealed that the asymmetric impurity distribution, with a higher concentration on the source side and a lower concentration on the drain side controlled by the TII energy and angle, has potential for the realization of a high eGR/hGR by reducing the BTBT distance and a low off-state leakage. As a result, a steep on/off switching with a current ratio greater than 105 under an operating voltage of 0.3 V can be achieved by careful optimization of the implanted impurity distributions.