Abstract
Integrated circuit susceptibility to radiation-induced faults remains a major reliability concern. The continuous downscaling of device feature size and the reduction in supply voltage in CMOS technology tend to worsen the problem. Thus, the evaluation of Soft Error Rate (SER) in the presence of multiple transient faults is necessary, since it remains an open research field. In this work, a Monte-Carlo simulation-based methodology is presented taking into consideration the masking mechanisms and placement information. The proposed SER estimation tool exploits the results of a Single Event Transient (SET) pulse characterization process with HSPICE to obtain an accurate assessment of circuit vulnerability to radiation. A new metric, called Glitch Latching Probability, which represents the impact of the masking effects on a SET, is introduced to identify gate sensitivity and, finally, experimental results on a set of ISCAS’ 89 benchmarks are presented.
Highlights
Reliability has always been one of the major concerns for the VLSI industry, especially in recent years, as there were various challenges with the continuous shrinking of the integration technology [1].Radiation-induced hazards occupy a central place in the range of reliability issues of IntegratedCircuits (ICs)
We present a detailed overview of Soft Error Rate (SER) analysis for combinational logic, which focuses on the modeling and handling of multiple transients originated from a single particle strike
The proposed tool is implemented in C and all the experiments are performed on a Linux workstation with an Intel Core i7-3770 processor @3.4GHz and 8GB of main memory and are conducted on a set of ISCAS’ 89 benchmark circuits, synthesized with respect to 45nm Nangate Open Cell
Summary
Reliability has always been one of the major concerns for the VLSI industry, especially in recent years, as there were various challenges with the continuous shrinking of the integration technology [1].Radiation-induced hazards occupy a central place in the range of reliability issues of IntegratedCircuits (ICs). The most prevalent causes of such hazards are the alpha particles emitted from radioactive impurities in the package material of the ICs [2], and high-energy particles, mostly neutrons, from terrestrial cosmic rays [3] that may strike the silicon material of a chip When such an incident occurs on a transistor, several electron-hole pairs are created which in turn, may be collected by the depletion region. This disturbance may momentarily cause a change of gate output logic state, which is well-known as a Single Event Transient (SET) The nature of this kind of errors is non-destructive but can affect the proper circuit operation and lead to system malfunction. These errors are called soft errors and Soft Error Rate (SER) indicates the grade of a circuit susceptibility to radiation-induced faults
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